Intel Reveals 2023-2025 Xeon CPU Roadmap: Emerald Rapids in 2023, Granite Rapids and Sierra Forest in 2024, Clearwater Forest in 2025 (2023)

Intel onlywithout sleepits 2023-2025 next-generation Xeon data center CPU roadmap with new P-Core and E-Core chip families.

Intel Xeon Official Map 2023-2025: Emerald Rapids followed by Granite Rapids and Sierra Forest followed by Clearwater Forest

Intel has divided its next-generation Xeon data center CPU lineup into two categories, P-Core and E-Core. P-Core products will be the standard Xeon products we've seen over the years. Then there are the E-Core products, which will use the most energy efficient architectures, and the first product is expected next year in the form of Sierra Forest.

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5th generation Intel Xeon Scalable processors, codenamed Emerald Rapids

The successor to Intel's 4th generation Sapphire Rapids line of CPUs comes in the form of the 5th generation Xeon family codenamedEmerald Rapids. Emerald Rapids-SP CPUs are already in testing and expected to be released in Q4 2023.

These chips will offer higher quality silicon with continuous volume validation. Other features of the Emerald Rapids SP series include a focus on higher performance per watt for the same power consumption, delivering greater core density from generation to generation. The chips will be fully compatible with the existing fourth-generation Eagle Stream platform, allowing for easy migration from the previous generation.

Emerald Rapids is expected to leverage the core architecture of Raptor Cove, an optimized variant of the Golden Cove core that offers a 5-10% IPC improvement over Golden Cove cores. It will also have up to 64 cores and 128 threads, which is a small increase in cores over the 56 cores and 112 threads of the Sapphire Rapids chips.

  • Intel Emerald Rapids SP (64 core SKU) – 320MB L3 + 128MB L2 =Total cache of 448 MB
  • AMD EPYC Genua (SKU com 64 Kernen) - 384 MB L3 + 96 MB L2 =Total cache of 480 MB
  • Intel Sapphire Rapids-SP (60 core SKU) – 112.5MB L3 + 120MB L2 =232.5 MB total cache

Emerald Rapids-SP Xeon CPUs will reach 64 cores and will be available in 1S/2S server configurations. The 4S-8S platforms will have to wait until the next generation of Granite Rapids-SP Xeon chips for an upgrade. However, one key area that should get a big boost in Emerald Rapids-SP Xeon CPUs is the L3 cache. Emerald Rapids SP CPUs will include up to 320MB of L3 cache. That's 2.84 times more than the 112.5 MB L3 cache of the top Sapphire Rapids-SP chip, the Xeon 8490H.

Next generation Intel Xeon Scalable processors codenamed Granite Rapids

After Emerald Rapids, Intel plans to move to a new Xeon data center CPU family and platform that will come in the form of Granite Rapids. Delivery of the new processors is scheduled for 2024 and will follow Sierra Forest closely. The Granite Rapids SP CPUs use the latest x86 CPU architecture based on the Intel Process Node 3 which is expected to be known as the Redwood Cove core.

Intel gave an overview of its Granite Rapids SP CPU during its "Rapid" keynote, which included three compute tiles and two I/O dies in the top and middle sections. The chip is expected to have more than 100 P cores, but the exact core count has not been officially announced.

Supporting Mountain Stream and Birch Stream platforms, Granite Rapids-SP Xeon CPUs will further increase core densities, memory and I/O innovations such as support for DDR5-8800 MCR RDIMMs. The new storage will provide a maximum bandwidth of 83% and up to 1.5TB/sec bandwidth to the platform. Intel also shows a demo of one of the first Granite Rapids SP chips with DDR5-8000 MT/s memory on a dual-socket (2S) platform and in excellent condition:

CPUs Intel Granite Rapids Xeon com DDR5-8000 MCR RDIMMs:

Intel E-Core Xeon CPU Lineup with 1st Gen Sierra Forest and 2nd Gen Clearwater Forest

Simultaneously with the launch of IntelCPU Granit Rapids-SP Xeon, Chipzilla will also release its first-generation E-Core products, codenamed Sierra Forest, which have already achieved excellent silicon health and are scheduled to ship in the first half of 2024. The CPU will house up to 144 cores based on Intel 3 processes in the node and offers a new class of Xeon chips designed for cloud-optimized workloads.

At this point it turns out that Intel wants to compete with all of AMD's offerings. While the standard Scalable family competes against major EPYC opponents, Sierra Forest will compete with a variety of compute-optimized EPYC parts.

Intel Sierra Forest CPUs with 144 cores will compete with AMDsEPYC Bergamo CPU with 128 coresUtilizing Zen 4C architecture optimized for efficiency in the same segment as the cloud data center. Intel demonstrated the Sierra Forest chip at 100% on all 144 cores, as shown below:

Intel Sierra Forest 144-Core Xeon CPU with 100% integrity in demo:

These chips will be followed by the second-generation E-Core Xeon family, known as Clearwater Forest, scheduled for release in 2025, which will use the Intel 18A process node and offer even higher core counts. HeIntel 18A Compute Nodewill refine the RibbonFET architecture to enable another big leap in transistor and chip performance.

Furthermore, the company has also provided an update on its upcoming GPU, dedicated AI, and FPGA roadmap. The GPU lineup will include a new generation of the Data Center GPU Flex series, codenamed Melville Sound, and the company will also ship its future accelerator, codenamed Falcon Shores.Falcon Shores recently replaced the Rialto Bridgeand will only feature first-generation GPU cores, with a subsequent generation combining CPU and GPU cores in chiplet form, similar to AMD's Instinct MI300 accelerator.

In addition to the next-generation FPGAs of the eASIC and AGILEX families, the next-generation Habana Gaudi accelerators with a completely new architecture are also mentioned. Overall, Intel's future roadmap and lineup appears to be littered with a lot of chips, but the main question remains whether Chipzilla will be able to reach roadmap milestones on time or face delays similar to the previous generation.

Intel Xeon CPU Families (Preliminary):

known brandDiamond Rapidsforest with clear watergranite rapidsWald-SierraEmerald RapidsSapphire RapidsEissee-SPLago Cooper-SPWaterfall lake-SP/APSkylake-SP
process node¿Intel 20A?Intel 18AIntel 3Intel 3Intel7Intel710nm+14nm++14nm++14nm+
platform nameIntel Mountain Stream
Intel Mountain Stream
Intel Mountain Stream
Intel Mountain Stream
Intel-Eagle-FlowIntel-Eagle-FlowIntel WhitleyIntel Cedar IslandIntel PurleyIntel Purley
central architecturebay of lionsDefinitelyRedwood Cove+?electronic coreshut up boygolden baysunny baywaterfall lakewaterfall lakeHeaven
IPC Improvement (vs. previous gen)DefinitelyDefinitelyDefinitelyDefinitely1%?19%20%0%0%10%
MCP (Multi-Chip Pack)-SKUsEDefinitelyEEEENONOENO
PlugLGA 4677/7529LGA 4677/7529LGA 4677/7529LGA 4677/7529LGA 4677LGA 4677LGA4189LGA4189LGA3647LGA3647
Max Core CountBis 144?DefinitelyBis 136?144-336Bis 64?bis 56bis 40bis 28bis 28bis 28
Maximum number of topicsBis 288?DefinitelyBis 272?144-336Bis 128?bis 112bis 80bis 56bis 56bis 56
L3-Cache max.DefinitelyDefinitelyDefinitely144-336MB L3?320MB L3?105MB L360MB L338,5MB L338,5MB L338,5MB L3
vector motorsAVX-1024/FMA3?DefinitelyAVX-512/FMA3?DefinitelyAVX-512/FMA2AVX-512/FMA2AVX-512/FMA2AVX-512/FMA2AVX-512/FMA2AVX-512/FMA2
memory mediaUp to 12 channels DDR6-7200?DefinitelyDDR5-6400 up to 12 channelsUp to 8-channel DDR5-6400?Up to 8-channel DDR5-5600?Up to 8 DDR5-4800 channelsDDR4-3200 up to 8 channelsDDR4-3200 up to 6 channelsDDR4-2933 6 channelsDDR4-2666 6 channels
PCIe generation supportPCIe 6.0 (128 lanes)?DefinitelyPCIe 5.0 (96 lanes)PCIe 5.0 (Ranges to be determined)PCIe 5.0 (80 lanes)PCIe 5.0 (80 lanes)PCIe 4.0 (64 lanes)PCIe 3.0 (48 lanes)PCIe 3.0 (48 lanes)PCIe 3.0 (48 lanes)
TDP Area (PL1)Up to 500W?DefinitelyUp to 500WUp to 350WUp to 375W?Up to 350W105-270 W150W-250W165W-205W140W-205W
DIMM 3D Xpoint OptaneDonahue-Passa?DefinitelyDonahue-PassDefinitelycrow's stepcrow's stepBarlow-PassBarlow-PassApache-PassN / D
competenceAMD EPYC VenedigAMD EPYCZen 5CAMD EPYC TorinoAMD EPYC BergamoAMD EPYC Genua-XAMD EPYC Genua ~ 5 nmAMD EPYC Milan 7nm+AMD EPYC Roma 7nmAMD EPYC Roma 7nmAMD EPYC Neapel 14nm
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